DocumentCode
1140130
Title
Design, implementation and evaluation of a high-speed integrated Hamming neural classifier
Author
Grant, David ; Taylor, John ; Houselander, Paul
Author_Institution
BNR Eur., Maidenhead, UK
Volume
29
Issue
9
fYear
1994
fDate
9/1/1994 12:00:00 AM
Firstpage
1154
Lastpage
1157
Abstract
This paper describes a fixed-weight Hamming binary neural classifier chip suitable for applications where high-speed operation is required. The circuit uses switched current-mode techniques throughout and achieves classification in one forward pass through the network. The chip was realized in 2.4-μm n-well CMOS technology and was designed to recognize the integers 0-9. It achieved a classification rate of 10 MHz without any observable tendency to misclassification or instability
Keywords
CMOS integrated circuits; Hamming codes; feedforward neural nets; neural chips; pattern recognition; 10 MHz; 2.4 mum; classification rate; fixed-weight Hamming binary neural classifier chip; high-speed integrated Hamming neural classifier; high-speed operation; instability; misclassification; n-well CMOS technology; one forward pass; switched current-mode techniques; CMOS technology; Computer networks; Energy consumption; Error correction; High speed integrated circuits; Neural networks; Power generation economics; Probes; Robustness; Switching circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.309915
Filename
309915
Link To Document