Title :
A compact digital delay module with VME and FAIR interfaces
Author :
Ordine, Antonio ; Boiano, Alfonso ; De Cesare, Walter ; D´Onofrio, Antonio ; Giordano, Gerardo ; Spadaccini, Giulio
Author_Institution :
Ist. Nazionale di Fisica Nucl., Napoli, Italy
Abstract :
A very compact 32-channel digital delay module has been designed to fit in a single VME 6 U unit. It is equipped with both VME and Fast Intercrate Readout (FAIR) interfaces. Furthermore, a local manual programmability was implemented to use the module also in a stand-alone mode. A variety of NIM and ECL output have been implemented. A special ECL input allows the selection of different output regimes. The thermal stabilization is controlled via a PLL based circuit. The main features of the module are the wide range for the delay and the width of the output pulse: from 25 ns up to 6400 ns, in 25 ns steps; and the low jitter: values of the order of 27 ps (11 ppm) were measured in several bench tests.
Keywords :
data acquisition; delay circuits; digital control; high energy physics instrumentation computing; particle detectors; phase locked loops; readout electronics; system buses; 25 to 6400 ns; ECL output; FAIR interface; Fast Intercrate Readout; NIM output; PLL based circuit; VME interface; bench tests; data acquisition; detection systems; digital control; local manual programmability; low jitter values; output pulse delay; output pulse width; output regimes; single VME 6 U unit; stand-alone mode; thermal stabilization; very compact 32-channel digital delay module; Analog-digital conversion; Circuits; Control systems; Delay; Distributed decision making; Laboratories; Nuclear electronics; Phase locked loops; Position sensitive particle detectors; Pulse measurements; Data acquisition; data buses; digital control;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2004.834959
