A high accuracy fixed-width Booth multiplier using select probability estimation bias

This paper proposes a select probability estimation bias (SPEB) for fixed-width Booth multipliers. Considering the special condition in Booth encoder, the selection mode is included to compensate truncation error in fixed-width Booth multiplier design. The probability estimation method is adopted in the general condition. Compared to the existing works, the proposed SPEB 16×16 fixed-width Booth multiplier achieves higher accuracy with only a little area overhead. In addition, the proposed SPEB multiplier was implemented into the TSMC 0.18-μm CMOS process. The results shows the 16×16 SPEB multiplier achieves 10 ns path delay with a power consumption of 1.6 mW. Therefore, the proposed SPEB multiplier achieves a high accuracy with low-cost design.