Title :
Suppression of boron TED by low temperature SPC anneal prior to dopant activation
Author :
Takeuchi, Hideki ; Ranade, Pushkar ; King, Tsu-Jae
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
12/1/2002 12:00:00 AM
Abstract :
The application of a low temperature solid phase crystallization (SPC) anneal to nonpreamorphized junctions prior to a high-temperature dopant activation anneal is proposed. The SPC anneal eliminates implantation-induced defects which give rise to transient enhanced diffusion (TED), and thus reduce both vertical and lateral boron diffusion by 16 nm and 24 nm, respectively, in a conventional CMOS process thermal budget. Improved short channel effect (SCE) immunity was demonstrated with sub-100 nm FETs.
Keywords :
MOSFET; boron; diffusion; elemental semiconductors; recrystallisation annealing; silicon; 100 nm; CMOS process; FETs; Si:B; TED; high-temperature dopant activation anneal; implantation-induced defects; lateral diffusion; low temperature SPC anneal; nonpreamorphized junctions; short channel effect immunity; solid phase crystallization; thermal budget; transient enhanced diffusion; vertical diffusion; Annealing; Boron; CMOS process; Crystallization; Fabrication; MOSFETs; Rapid thermal processing; Solids; Temperature; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2002.804694
