DocumentCode
1140784
Title
Device characteristics of the -D BiCMOS technology using selective epitaxial growth and lateral solid phase epitaxy
Author
Liu, Haitao ; Kumar, Mahender ; Sin, Johnny K O
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume
49
Issue
12
fYear
2002
fDate
12/1/2002 12:00:00 AM
Firstpage
2359
Lastpage
2362
Abstract
Device characteristics of the BiCMOS technology using selective epitaxial growth (SEG) and lateral solid phase epitaxy (LSPE) are reported. Results indicate that the current drive of the PMOS devices on the LSPE layer is only 13% lower than that of the bulk PMOS devices, and the propagation delay of the three-dimensional (3-D) inverter built using this technology is 23% faster than that of the conventional bulk inverter. The bipolar transistors fabricated in the SEG regions also provide good performance with a peak fT of 17 GHz and BVCEO of 4.3∼5.3 V. The SEG/LSPE technique for 3-D integration has the advantages of low cost, low thermal budget, and good material quality for device fabrication. This 3-D BiCMOS technology is very promising for lower power, high-density, and high-speed integrated circuits (ICs) applications.
Keywords
BiCMOS logic circuits; VLSI; high-speed integrated circuits; logic gates; low-power electronics; semiconductor growth; solid phase epitaxial growth; 17 GHz; 4.3 to 5.3 V; BiCMOS technology; current drive; high-speed integrated circuits; lateral solid phase epitaxy; low-power ICs; material quality; propagation delay; selective epitaxial growth; thermal budget; three-dimensional inverter; BiCMOS integrated circuits; Bipolar transistors; Costs; Epitaxial growth; Fabrication; Integrated circuit technology; Inverters; MOS devices; Propagation delay; Solids;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2002.805615
Filename
1178008
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