Title :
Reliability and Performance of Error-Correcting Memory and Register Arrays
Author :
Elkind, Steven A. ; Siewiorek, Daniel P.
Author_Institution :
Department of Electrical Engineering, Carnegie- Mellon University
Abstract :
A brief survey of memory chip failure modes shows that partial chip failures are the dominant failure mode. A single error-correcting (SEC) code memory model is developed based on the results of the survey. The effect of memory support circuitry, often ignored, is included. Examples illustrate that the support circuitry dominates the memory system reliability for wide ranges of memory system parameters.
Keywords :
Error-correcting codes; fault tolerance; memory; performance; reliability; Block codes; Circuits; Costs; Degradation; Error correction; Error correction codes; Fault tolerant systems; Predictive models; Registers; Reliability; Error-correcting codes; fault tolerance; memory; performance; reliability;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1980.1675475