DocumentCode :
1141213
Title :
Synchronous Sequential Machines: A Modular and Testable Design
Author :
Saluja, Kewal K.
Author_Institution :
Department of Electrical Engineering, University of Newcastle
Issue :
11
fYear :
1980
Firstpage :
1020
Lastpage :
1025
Abstract :
It will be shown that a single-input n-definite machine realized by a universal modular tree, in which each module consists of AND-EXCLUSIVE-OR-DELAY (AND-EOR-DELAY) as a basic element, can be tested for single stuck-type-faults by tests of length 2n + 3 only. This is a marked improvement over the previous results for trees consisting of AND-OR-DELAYS, which are known to have test lengths of exponential growth.
Keywords :
Combination circuits; fault detection; sequential machines; single-feedback realization; test sequence; universal modular tree; Australia; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Logic testing; Sequential analysis; Shift registers; Tree data structures; Combination circuits; fault detection; sequential machines; single-feedback realization; test sequence; universal modular tree;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1980.1675499
Filename :
1675499
Link To Document :
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