Title :
A High Data-Rate Digital Output Correlator Design
Author :
Current, K. Wayne
Author_Institution :
Department of Electrical Engineering, University of California
fDate :
5/1/1980 12:00:00 AM
Abstract :
A high data-rate digital output correlator integrated circuit design which uses new synchronous sequential quaternary threshold logic gates is proposed and compared to the all-binary equivalent realization of this function. Substantial integrated circuit device count and die area savings are projected for the multiple valued logic realization.
Keywords :
Digital correlators; latched quaternary threshold logic full adders; multiple valued logic; parallel counters; threshold logic; Adders; Clocks; Correlators; Counting circuits; Large scale integration; Logic circuits; Logic design; Logic devices; Logic gates; Multivalued logic; Digital correlators; latched quaternary threshold logic full adders; multiple valued logic; parallel counters; threshold logic;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1980.1675592
