Comparison of bipolar NPN polysilicon emitter interface formation at three different manufacturing sites

The formation of polysilicon emitters at three different fabrication facilities is examined with a view to understanding critical manufacturing steps. This work demonstrates the effects of different interface procedures on the formation of the native oxide interfaces and how the transistor electrical properties are affected. The sensitivity of the interface break up, by rapid thermal annealing, to the initial interface thickness is quantified. Polysilicon emitter transistors from the three processes are compared and it is found that the devices with recrystallized polysilicon behave as ideal single crystal transistors