• DocumentCode
    1142801
  • Title

    Test Sets for Combinational Logic—The Edge-Tracing Approach

  • Author

    Stoffers, Karl E.

  • Author_Institution
    Department of Electrical and Electronic Engineering, California State University
  • Issue
    8
  • fYear
    1980
  • Firstpage
    741
  • Lastpage
    746
  • Abstract
    A method for fault analysis of multilevel combinational logic circuits with single stuck-at-faults is described. It determines the sensitizing input combinations (separating edges) from the output function and then traces their paths from the output toward the inputs. The handling of multiple path sensitization in this approach is much simpler than in other path-tracing techniques. Subscripting of variables is not needed and dead-ending (as encountered in the D-algorithm) cannot occur.
  • Keywords
    Backward tracing; convergence-point test for multiple paths; no backtracking; no dead-ending; path sensitizing; stuck-at-faults; Circuit faults; Circuit testing; Circuit topology; Combinational circuits; Fault location; Hamming distance; Logic design; Logic testing; Partitioning algorithms; Backward tracing; convergence-point test for multiple paths; no backtracking; no dead-ending; path sensitizing; stuck-at-faults;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1980.1675660
  • Filename
    1675660
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1142801