Title :
A Design of Programmable Logic Arrays with Universal Tests
Author :
Fujiwara, Hideo ; Kinoshita, Kozo
Author_Institution :
Department of Electronic Engineering, Osaka University
Abstract :
In this paper the problem of fault detection in easily testable programmable logic arrays (PLA\´s) is discussed. The easily testable PLA\´s will be designed by adding extra logic. These augmented PLA\´s have the following features: 1) for a PLA with n inputs and m columns (product terms), there exists a "universal" test set such that the test patterns and responses do not depend on the function of the PLA, but depend only on the size of the PLA (the values n and m); 2) the number of tests is of order n + m. For the augmented PLA\´s, universal test sets to detect faults in PLA\´s are presented. The types of faults considered here are single and multiple stuck faults and crosspoint faults in PLA\´s. Fault location and repair of PLA\´s are also considered.
Keywords :
Easily testable design; fault detection; fault location; logic circuits; programmable logic arrays (PLA´s); universal test sets; Circuit faults; Circuit testing; Costs; Decoding; Electrical fault detection; Fault detection; Fault location; Logic design; Logic testing; Programmable logic arrays; Easily testable design; fault detection; fault location; logic circuits; programmable logic arrays (PLA´s); universal test sets;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1981.1675712
