• DocumentCode
    1143660
  • Title

    The Weighted Syndrome Sums Approach to VLSI Testing

  • Author

    Barzilai, Zeev ; Savir, Jacob ; Markowsky, George ; Smith, Merlin G.

  • Author_Institution
    IBM Thomas J. Watson Research Center
  • Issue
    12
  • fYear
    1981
  • Firstpage
    996
  • Lastpage
    1000
  • Abstract
    With the advent of VLSI, testing has become one of the most costly, complicated, and time consuming problems. The method of syndrome- testing is applicable toward VLSI testing since it does not require test generation and fault simulation. It can also be considered as a vehicle for self-testing. In order to employ syndrome-testing in VLSI, we electronically partition the chip into macros in test mode. The macros are then syndrome tested in sequence.
  • Keywords
    Partitioning; Syndrome-testing; self-testing; syndrome-testable design; Built-in self-test; Circuit faults; Circuit testing; Counting circuits; Digital circuits; Electronic equipment testing; Jacobian matrices; Logic testing; Vehicles; Very large scale integration; Partitioning; Syndrome-testing; self-testing; syndrome-testable design;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1981.1675744
  • Filename
    1675744