DocumentCode :
1143922
Title :
Self-align recessed source drain ultrathin body SOI MOSFET
Author :
Zhang, Zhikuan ; Zhang, Shengdong ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume :
25
Issue :
11
fYear :
2004
Firstpage :
740
Lastpage :
742
Abstract :
In this letter, a self-aligned recessed source/drain (ReS/D) ultrathin body (UTB) silicon-on-insulator (SOI) MOS technology is proposed and demonstrated. The thick diffusion regions of ReS/D are placed on a recessed trench, which is patterned on the buried oxide and go under the SOI film. The new structure reduces the parasitic S/D resistance without increasing the gate-to-drain Miller capacitance, which is the major advantage over the elevated S/D structure. Fabrication details and experimental results are presented. The scalability of the UTB MOSFETs and the larger design window due to reduced parasitics are demonstrated.
Keywords :
MOSFET; capacitance; silicon-on-insulator; MOS technology; SOI film; buried oxide; parasitic Miller capacitance; recessed trench; scalability; self-aligned recessed source drain structure; series resistance; silicon-on-insulator; ultrathin body SOI MOSFET; Amorphous silicon; Fabrication; Immune system; MOSFET circuits; Parasitic capacitance; Passivation; Planarization; Scalability; Silicon on insulator technology; Wet etching; Parasitic miller capacitance; ReS/D; SOI; UTB; recessed source/drain; scaling; series resistance; silicon-on-insulator; ultrathin body;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2004.837582
Filename :
1347213
Link To Document :
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