DocumentCode
1144558
Title
BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits
Author
Gowda, Sudhir M. ; Sheu, Bing J.
Volume
13
Issue
9
fYear
1994
fDate
9/1/1994 12:00:00 AM
Firstpage
1166
Lastpage
1170
Abstract
The BSIM plus MOS transistor model is developed for simulation of digital and analog VLSI circuits in advanced submicron technologies. A compact parameter set is carefully selected to accurately characterize transistors and achieve continuity of the drain current and its derivatives across the different regions of operation. Several submicron modeling techniques are described. Simulated results agree well with measured data of transistors from two industrial technologies
Keywords
MOS integrated circuits; SPICE; VLSI; circuit analysis computing; digital integrated circuits; linear integrated circuits; semiconductor device models; BSIM plus; MOS transistor model; MOSFET; SPICE model; analog VLSI circuits; digital VLSI circuits; drain current; submicron MOS VLSI circuits; submicron modeling techniques; Capacitance; Central Processing Unit; Circuit simulation; Electronics packaging; Finite element methods; Integrated circuit modeling; Integrated circuit packaging; Large scale integration; SPICE; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.310905
Filename
310905
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