Title :
Syndrome-Testing of " Syndrome-Untestable" Combinational Circuits
Author_Institution :
IBM T. J. Watson Research Center
Abstract :
In [1] and [2] a method of designing syndrome-testable combinational circuits was described. It was shown that, in general, syndrome-testable combinational circuits require some pin-penalty and maybe some logic for producing the testable design.
Keywords :
Inversion parity; reconvergent fan-out; unate function; Boolean functions; Circuit faults; Circuit testing; Combinational circuits; Design methodology; Jacobian matrices; Joining processes; Logic design; Logic testing; Pins; Inversion parity; reconvergent fan-out; unate function;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1981.1675849
