Title :
Optoelectronic winner-take-all VLSI shunting neural network
Author :
Kane, Jonathan S. ; Kincaid, Thomas G.
Author_Institution :
Rome Lab., Hanscom AFB, MA, USA
fDate :
9/1/1995 12:00:00 AM
Abstract :
In this paper we present an analog winner-take-all MOS VLSI (metal-oxide semiconductor/very large scale integration) optoelectronic network. By varying either the input current or circuit parameters, the circuit can evidence several different behaviors such as contrast enhancement, strict winner-take-all, or winner-take-all with hysteresis. Simulation and experimental results from the prototype circuit are also discussed
Keywords :
MOS analogue integrated circuits; VLSI; analogue processing circuits; integrated optoelectronics; neural chips; optical neural nets; analog winner-take-all MOS VLSI optoelectronic network; contrast enhancement; hysteresis; optoelectronic winner-take-all VLSI shunting neural network; Circuits; Correlators; Holographic optical components; Holography; Hysteresis; MOSFETs; Neural networks; Neurons; Optical signal processing; Very large scale integration;
Journal_Title :
Neural Networks, IEEE Transactions on
