• DocumentCode
    1144963
  • Title

    Design for Testability—A Survey

  • Author

    Williams, T.W. ; Parker, Kenneth P.

  • Author_Institution
    General Technology Division, IBM
  • Issue
    1
  • fYear
    1982
  • Firstpage
    2
  • Lastpage
    15
  • Abstract
    This paper discusses the basics of design for testability. A short review of testing is given along with some reasons why one should test. The different techniques of design for testability are discussed in detail. These include techniques which can be applied to today´s technologies and techniques which have been recently introduced and will soon appear in new designs.
  • Keywords
    Built-In Logic Block Observation (BILBO); Level Sensitive Scan Design (LSSD); Random Access Scan; Scan Path; Scan/Set Logic; Signature Analysis; self test; test generation; testing; Controllability; Costs; Design for testability; Linear feedback shift registers; Logic design; Logic devices; Logic gates; Logic testing; Manufacturing; Observability; Built-In Logic Block Observation (BILBO); Level Sensitive Scan Design (LSSD); Random Access Scan; Scan Path; Scan/Set Logic; Signature Analysis; self test; test generation; testing;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1982.1675879
  • Filename
    1675879
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1144963