Title :
A dynamic scaling FFT processor for DVB-T applications
Author :
Lin, Yu-Wei ; Liu, Hsuan-Yu ; Lee, Chen-Yi
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Univ., Hsinchu, Taiwan
Abstract :
This paper presents an 8192-point FFT processor for DVB-T systems, in which a three-step radix-8 FFT algorithm, a new dynamic scaling approach, and a novel matrix prefetch buffer are exploited. About 64 K bit memory space can be saved in the 8 K point FFT by the proposed dynamic scaling approach. Moreover, with data scheduling and pre-fetched buffering, single-port memory can be adopted without degrading throughput rate. A test chip for 8 K mode DVB-T system has been designed and fabricated using 0.18-μm single-poly six-metal CMOS process with core area of 4.84 mm2. Power dissipation is about 25.2 mW at 20 MHz.
Keywords :
CMOS digital integrated circuits; OFDM modulation; buffer storage; digital signal processing chips; digital video broadcasting; fast Fourier transforms; integrated circuit design; 0.18 micron; 20 MHz; 25.2 mW; 8192-point FFT processor; DVB-T applications; data scheduling; dynamic scaling FFT processor; fast Fourier transform; matrix prefetch buffer; orthogonal frequency division multiplexing; pre-fetched buffering; single-port memory; six-metal CMOS process; three-step radix-8 FFT algorithm; Bandwidth; Degradation; Digital video broadcasting; Discrete Fourier transforms; Energy consumption; Fast Fourier transforms; OFDM; Power dissipation; Prefetching; Throughput; DVB-T; FFT; OFDM; fast Fourier transform; orthogonal frequency division multiplexing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.835815
