• DocumentCode
    1145376
  • Title

    A silicidation-induced process consideration for forming scale-down silicided junction

  • Author

    Cheng, H.C. ; Juang, M.H. ; Lin, C.T. ; Huang, L.M.

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    15
  • Issue
    9
  • fYear
    1994
  • Firstpage
    342
  • Lastpage
    344
  • Abstract
    A process consideration for forming silicided shallow junctions, arising from silicidation process, has been discussed. The CoSi/sub 2/ shallow p/sup +/n junctions formed by various schemes are characterized. The scheme that implants BF/sub 2//sup +/ ions into thin Co films on Si substrates and subsequent silicidation yields good junctions, but the problems about the dopant drive-in and knock-on of metal deeply degrade this scheme. In the regime that implants the dopant into Si and then Co deposition, however, a large perimeter leakage of 0.1 nA/cm is caused. Generation current, associated with a defect-enhanced diffusion of Co in Si during silicidation, dominates the leakage. A high-temperature pre-activation prior to Co deposition reduces the perimeter leakage to 0.038 nA/cm, but which deepens the junctions.<>
  • Keywords
    cobalt; metallic thin films; metallisation; p-n heterojunctions; BF/sub 2//sup +/ ions; Co; CoSi/sub 2/; CoSi/sub 2/ shallow p/sup +/n junctions; Si; Si substrates; defect-enhanced diffusion; dopant drive-in; generation current; high-temperature pre-activation; perimeter leakage; process consideration; scale-down silicided junction; silicidation process; silicidation yields; silicidation-induced process; silicided shallow junctions; thin Co films; Annealing; Circuits; Degradation; Diodes; Implants; Leakage current; Semiconductor films; Silicidation; Silicides; Temperature;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.311128
  • Filename
    311128