Numerical analysis of slow current transients and power compression in GaAs FETs

Two-dimensional transient simulation of GaAs MESFETs is performed when the gate voltage and the drain voltage are both changed abruptly. Quasi-pulsed current-voltage (I-V) curves are derived from the transient characteristics. It is discussed how the slow current transients (lag phenomena) and the pulsed I-V curves are affected by the existence of substrate traps and surface states. It is shown that the so-called power compression could occur both due to substrate traps and due to surface states. Effects of impact ionization of carriers on these phenomena are also discussed. It is shown that the lag phenomena and the power compression are weakened when impact ionization of carriers becomes important, because generated holes may help the traps to change their ionized densities quickly.