DocumentCode
1145985
Title
A 12-bit 500-ns subranging ADC
Author
Kolluri, Madhav P V
Author_Institution
Signetics Co., Sunnyvale, CA, USA
Volume
24
Issue
6
fYear
1989
fDate
12/1/1989 12:00:00 AM
Firstpage
1498
Lastpage
1506
Abstract
A subranging 12-b ADC (analog/digital converter) with analog and digital correction has been developed in a high-speed bipolar process. A conversion is performed in four stages. The settling requirement of the subtraction digital/analog converters is postponed until the final stage, resulting in a conversion time of 500 ns. The use of Ti-W fuse-link based trimming permits the critical circuit components to be adjusted at the wafer level with only a few pads. The circuit has been implemented in a die area of 25 mm2 and dissipates 650 mW
Keywords
analogue-digital conversion; bipolar integrated circuits; 12 bit; 500 ns; 650 mW; A/D convertor; TiW fuses; analog/digital converter; analogue correction; digital correction; fuse-link based trimming; high-speed bipolar process; monolithic IC; subranging ADC; Analog-digital conversion; Attenuation; Circuits; Degradation; Digital signal processing; Error correction; Helium; Logic; Radar signal processing; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.44985
Filename
44985
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