Title :
The Prime Memory System for Array Access
Author :
Lawrie, Duncan H. ; Vora, Chandra R.
Author_Institution :
Department of Computer Science, University of Illinois
fDate :
5/1/1982 12:00:00 AM
Abstract :
In this paper we describe a memory system designed for parallel array access. The system is based on the use of a prime nwnber of memories and a powerful combination of indexing hardware and data alignment switches. Particular emphasis is placed on the indexing equations and their implementation.
Keywords :
Array access; Burroughs Scientific Processor (BSP) conflict-free array memory; SIMD computer memory; memory system; parallel computer system; Application software; Computer science; Concurrent computing; Equations; Hardware; Indexing; Physics; Pipelines; Switches; Weather forecasting; Array access; Burroughs Scientific Processor (BSP) conflict-free array memory; SIMD computer memory; memory system; parallel computer system;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1982.1676020
