Single-wafer cluster tool performance: an analysis of throughput

Author

Perkinson, Terry L. ; McLarty, Peter K. ; Gyurcsik, Ronald S. ; Cavin, Ralph K., III

Author_Institution

Dept. of Electr. Eng., North Carolina State Univ., Raleigh, NC, USA

Volume

7

Issue

3

fYear

1994

fDate

8/1/1994 12:00:00 AM

Firstpage

369

Lastpage

373

Abstract

Cluster tools gained greater acceptance over the past several years, although concerns still exist over the throughput these tools can achieve. This paper presents an analysis of the relationship between process times, transport times, and maximum throughput in an individual cluster tool. Theoretical models which quantify the time required to process both an individual wafer and a lot in a cluster tool are developed. Three techniques for increasing throughput, based on these models, are also presented. These modifications require minimal modification of many existing designs and can yield significant increases in performance

Keywords

integrated circuit manufacture; modelling; semiconductor technology; transient response; cluster tool performance; maximum throughput; models; process times; single-wafer cluster tool; throughput analysis; transport times; Analytical models; Delay estimation; Equations; Materials processing; Packaging; Performance analysis; Predictive models; Semiconductor device modeling; Throughput;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.311340

Filename

311340