DocumentCode :
1146989
Title :
An Upper Bound for the Synthesis of Generalized Parallel Counters
Author :
Dormido, S. ; Canto, M.A.
Author_Institution :
Departamento de Informatica y Automática, Universidad Complutense, Ciudad Universitaria
Issue :
8
fYear :
1982
Firstpage :
802
Lastpage :
805
Abstract :
Recently, an algorithm has been developed for synthesizing generalized parallel counters (GPC´s) with a network of smaller ones [11]. In this correspondence we obtain an upper bound q, for the number of levels q in the synthesis of GPC´s. This upper bound generalizes and improves the values deduced by other authors in [13] and [14].
Keywords :
Digital counters; fast multipliers; multiple input adders; parallel counter networks; parallel counters; Adders; Concurrent computing; Correlators; Counting circuits; Digital arithmetic; Logic devices; Network synthesis; Upper bound; Digital counters; fast multipliers; multiple input adders; parallel counter networks; parallel counters;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1982.1676088
Filename :
1676088
Link To Document :
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