DocumentCode :
1147104
Title :
Optimum crystallographic alignment for Si n-channel ballistic DGFETs
Author :
Laux, S.E.
Author_Institution :
Semicond. R&D Center, IBM Res. Div., Yorktown Heights, NY, USA
Volume :
26
Issue :
9
fYear :
2005
Firstpage :
679
Lastpage :
681
Abstract :
Optimum intrinsic device switching time for a 7.5-nm gate-length Si n-channel double-gate field-effect transistor (DGFET) in the limit of pure ballistic transport occurs when channel quantization/transport directions are aligned to the <1 1 0>/<0 0 1> crystallographic directions, respectively. The computed switching time of 0.123 ps is 5% less than the value obtained with the more "conventional" alignment, i.e., <1 0 0>/<0 1 1>. The change in switching time versus arbitrary crystallographic alignment is fully investigated and is compared to the case of the same DGFET made from Ge.
Keywords :
Schottky gate field effect transistors; ballistic transport; crystal orientation; elemental semiconductors; germanium; silicon; 0.123 ps; 7.5 nm; Ge; Ge DGFET; Si; Si n-channel ballistic DGFET; ballistic transport; channel quantization; crystallographic direction; double-gate field-effect transistor; optimum crystallographic alignment; optimum intrinsic device switching time; transport direction; Ballistic transport; Boundary conditions; Crystallography; Double-gate FETs; Hafnium oxide; Helium; Insulation; Quantization; Research and development; Threshold voltage; Ballistic transport; Ge double-gate field-effect transistor (DGFET); Si double-gate field-effect transistor (DGFET); intrinsic switching time; n-channel; optimum crystallographic alignment;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2005.853641
Filename :
1498997
Link To Document :
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