Lower DIBL in inverted substrate of UTBB SOI n-MOSFETs

In this paper, based on simulations, we present the impact of the different substrate space-charge conditions, on the Drain Induced Barrier Lowering (DIBL) of Ultra-Thin Body (UTB) SOI MOSFETs with two buried oxide (BOX) thicknesses as a function not only of substrate bias but also of drain lateral field penetration into the BOX and underlying substrate. We notice that the lowest DIBL is achieved when the substrate is in inversion regime. In the case of Ultra-Thin BOX (UTBB), the devices exhibit a significant reduction of DIBL which, with substrate inversion, becomes comparable to the use of ground plane, for gate length down to 25 nm. The simulation results are well supported and explained by the simulated potential variations at the substrate / BOX interface.