On the blocking capability of a planar p-n junction under the influence of a high-voltage interconnection - a 3-D simulation

The routing of interconnections along the surface of a high-voltage IC presents one of the major issues for the IC designer. A special problem appears, if the interconnection can stay under a high-voltage signal and has to cross the boundaries of p-n junctions. In this paper, the influence of a high-voltage interconnection (HVI) on the blocking capability of a planar p-n junction including a JTE-design is investigated numerically by solving Poisson´s equation under the depletion approximation. Recent 2-D simulations have shown, that a HVI crossing the space charge region within a distance smaller than 5 μm reduces the breakdown voltage drastically. However, these calculations ignored the limited lateral extension of real interconnection stripes and tend to overestimate its influence. As exhibited by the 3-D simulations in this paper, the influence of the stripe width can be ignored only for such structures, where the width of the stripe is in the same order of magnitude as the depletion layer width. For smaller stripe widths the influence of the HVI is lower. The dependence of the breakdown voltage on the stripe width is investigated for different distances between the HVI and the semiconductor surface