Title :
Iterative decoding using stochastic computation
Author :
Gaudet, V.C. ; Rapley, A.C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
fDate :
2/6/2003 12:00:00 AM
Abstract :
An iterative decoding architecture based on stochastic computational elements is proposed. Simulation results for a simple low-density parity-check code demonstrate near-optimal performance with respect to a maximum likelihood decoder. The proposed method provides an alternative to analogue decoding for high-speed/low-power applications.
Keywords :
error statistics; iterative decoding; stochastic processes; BER curves; bit error rate; factor graph translation; high-speed applications; iterative decoding architecture; low-density parity-check code; low-power applications; near-optimal performance; stochastic computational elements;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030217
