Title :
Demonstration of a high performance 4H-SiC vertical junction field effect transistor without epitaxial regrowth
Author :
Zhao, J.H. ; Tone, K. ; Zhang, J. ; Alexandrov, P. ; Fursin, L. ; Weiner, M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
fDate :
2/6/2003 12:00:00 AM
Abstract :
A high performance 4H-SiC vertical junction field effect transistor (VJFET) has been designed and fabricated using a self-aligned process which permits the formation of a highly vertical p+n junction gate and eliminates the need for epitaxial regrowth. Near 100% edge termination has been achieved, allowing the VJFETs to reach 392 V with a blocking layer of only 1.33 μm doped to 2 × 1016 cm-3, reaching a record low RON_SP of 1.4 mΩ cm2 at JD up to 348 A/cm2.
Keywords :
high-temperature electronics; junction gate field effect transistors; power field effect transistors; silicon compounds; wide band gap semiconductors; 1.33 micron; 392 V; SiC; VJFET; blocking layer; edge termination; p+n junction gate; self-aligned process; vertical junction field effect transistor;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030178
