Title :
The VLSI Complexity of Sorting
Author :
Thompson, Clark D.
Author_Institution :
Computer Science Division, University of California
Abstract :
The area-time complexity of sorting is analyzed under an updated model of VLSI computation. The new model makes a distinction between "processing" circuits and "memory" circuits; the latter are less important since they are denser and consume less power. Other adjustments to the model make it possible to compare pipelined and nonpipelined designs.
Keywords :
Area-time complexity; VLSI; VLSI sorter; bitonic sort; bubble sort; heapsort; mesh-connected computers; parallel algorithms; shuffle-exchange network; sorting; Algorithm design and analysis; Circuit analysis; Clocks; Computational modeling; Computer networks; Computer science; Concurrent computing; Parallel algorithms; Sorting; Very large scale integration; Area-time complexity; VLSI; VLSI sorter; bitonic sort; bubble sort; heapsort; mesh-connected computers; parallel algorithms; shuffle-exchange network; sorting;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1983.1676178
