DocumentCode :
1148102
Title :
Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing
Author :
Barzilai, Zeev ; Coppersmith, Don ; Rosenberg, Arnold L.
Author_Institution :
IBM T. J. Watson Research Center
Issue :
2
fYear :
1983
Firstpage :
190
Lastpage :
194
Abstract :
One has a shift register of length n and a collection of designated subsets of {0, 1,···, n-1}. The problem is to devise a method for feeding a string of bits into the shift register in such an order that, for each designated subset S = {k1,···, kr}, if one keeps track of the bit patterns appearing at the corresponding positions k1, ···, krof the shift register, all 2r possible bit patterns will ultimately appear at those positions. A simple and efficient solution to this problem, derived from the connections between polynomials over finite fields and linear feedback shift registers, is presented. Applications of this solution to the problem of VLSI self-testing are discussed and illustrated.
Keywords :
Linear feedback shift registers (LFSR); VLSI self-testing; primitive polynomials; Automatic logic units; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Degradation; Logic testing; Polynomials; Shift registers; Very large scale integration; Linear feedback shift registers (LFSR); VLSI self-testing; primitive polynomials;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1983.1676202
Filename :
1676202
Link To Document :
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