DocumentCode :
1148112
Title :
A Mesh-Connected Area-Time Optimal VLSI Multiplier of Large Integers
Author :
Preparata, Franco P.
Author_Institution :
Coordinated Science Laboratory and the Departments of Electrical Engineering and Computer Science, University of Illinois
Issue :
2
fYear :
1983
Firstpage :
194
Lastpage :
198
Abstract :
This paper describes a VLSI network for the multiplication of two N-bit integers, for very large N. The network, with its area 0(N) and operation time 0(√N), matches, within a constant factor, the known theoretical Ω(N2) lower bound to the area × (time)2measure of complexity in the VLSI model of computation. The network, which is based on the discrete Fourier transform, has an extremely regular mesh structure, and thus all wires have approximately the same length.
Keywords :
DFT; VLSI computation; integer multiplication; mesh networks; optimal networks; parallel processing; Area measurement; Computational modeling; Computer networks; Discrete Fourier transforms; Mesh networks; Semiconductor device measurement; Space technology; Time measurement; Very large scale integration; Wires; DFT; VLSI computation; integer multiplication; mesh networks; optimal networks; parallel processing;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1983.1676203
Filename :
1676203
Link To Document :
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