Title :
Second-Bit-Effect-Free Multibit-Cell Flash Memory Using
Split Charge Trapping Layer
Author :
Zhang, Gang ; Lee, Seung-Hwan ; Ra, Chang Ho ; Li, Hua-Min ; Yoo, Won Jong
Author_Institution :
SKKU Adv. Inst. of Nanotechnol., Sungkyunkwan Univ., Suwon, South Korea
Abstract :
In this paper, a Si3N4/ZrO2 split charge trapping layer (SCTL) is proposed for multibit-cell Flash memory. The complementary potential wells of Si3N4/ZrO2 storage nodes enable independent node control when the Fowler-Nordheim (F-N) method is applied for programming/erasing (P/E). Experiment and simulation results suggest that the 2-bit (2-b) charge storage is accomplished by physical data node separation for the SCTL rather than charge injection control. The well-confined charge storages suppress the second-bit effect, enabling excellent 2-b data clearance for short-channel SCTL devices. It was found that the remaining memory windows after 105 s decrease, dependent on the difference of the trap properties between Si3N4 and ZrO2.
Keywords :
charge injection; flash memories; silicon compounds; zirconium compounds; Fowler-Nordheim method; Si3N4-ZrO2; charge injection control; complementary potential wells; erasing; independent node control; memory windows; programming; second-bit-effect-free multibit-cell flash memory; short-channel SCTL devices; split charge trapping layer; storage capacity 2 bit; storage nodes; Channel hot electron injection; Charge carrier processes; Electron traps; Flash memory; Hot carriers; Nanotechnology; Potential well; Scalability; Split gate flash memory cells; Tunneling; $hbox{Si}_{3}hbox{N}_{4}/hbox{ZrO}_{2}$; Flash memory; second-bit effect; split charge trapping layer (SCTL);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2009.2026090