DocumentCode
1148787
Title
Vector-restoration-based static compaction using random initial omission
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
23
Issue
11
fYear
2004
Firstpage
1587
Lastpage
1592
Abstract
The restoration-based compaction procedures are the most computationally efficient static compaction procedures that reduce the length of a test sequence for a synchronous sequential circuit without reducing the fault coverage. We study one of the important components of the restoration-based compaction process, the initial omission process. This process selects test vectors that will be omitted from the test sequence initially, to start the restoration process. We also propose a specific procedure for the initial omission process. Experimental results for a variety of circuits and test sequences demonstrate that this procedure has a significant effect on the compacted test sequence length. Intuitively, the new procedure postpones the point at which the compaction procedure saturates, thus allowing smaller test lengths to be obtained before saturation is reached. The importance of continuing to explore this problem is related to the fact that static compaction procedures for synchronous sequential circuits are important for scan circuits as well.
Keywords
logic testing; sequential circuits; fault coverage; random initial omission; scan circuits; synchronous sequential circuit; test sequence; test vectors; vector-restoration-based static compaction; Circuit faults; Circuit testing; Cities and towns; Clocks; Compaction; Fault detection; Fault diagnosis; Sequential analysis; Sequential circuits; 65; Scan circuits; static test compaction; synchronous sequential circuits;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2004.836720
Filename
1350885
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