• DocumentCode
    1149067
  • Title

    Area—Time Optimal VLSI Circuits for Convolution

  • Author

    Baudet, Gérard M. ; Preparata, Franco P. ; Vuillemin, Jean E.

  • Author_Institution
    Department of Computer Science, Brown University
  • Issue
    7
  • fYear
    1983
  • fDate
    7/1/1983 12:00:00 AM
  • Firstpage
    684
  • Lastpage
    688
  • Abstract
    A family of VLSI circuits is presented to perform open convolution, i.e., polynomial multiplication. The circuits are all based on a recursive construction and are therefore particularly well adapted to automated design. All the circuits presented are optimal with respect to the area–time2 tradeoff, and, depending on the degree of paralleism or pipeline, they range from a compact but slow convolver to a large but very fast convolver.
  • Keywords
    Area-time optimality; VLSI design; convolution; Computer architecture; Convolution; Convolvers; Costs; Integrated circuit interconnections; Integrated circuit measurements; Polynomials; Semiconductor device measurement; Very large scale integration; Wires; Area-time optimality; VLSI design; convolution;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1983.1676300
  • Filename
    1676300
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1149067