Title :
A Two´s Complement Array Multiplier Using True Values of the Operands
Author :
Bandeira, Nuno ; Vaccaro, Ken ; Howard, James A.
Author_Institution :
Department of Electrical and Computer Engineering, University of California
Abstract :
A new algorithm for implementing the two´s complement multiplication of an m × n bit number is described. By interpreting certain positive partial product bits as negative, a parallel array is developed which has the advantage of using only one type of adder cell. A comparison with the Pezaris and Baugh-Wooley arrays is presented, showing that the new array is as fast as the Pezaris array and uses less hardware than the Baugh-Wooley implementation.
Keywords :
Array multiplier; Baugh-Wooley multiplier; Pezaris multiplier; binary multiplication; celluar-subtractor multiplier; parallel multiplier; Equations; Hardware; Large scale integration; Logic; Array multiplier; Baugh-Wooley multiplier; Pezaris multiplier; binary multiplication; celluar-subtractor multiplier; parallel multiplier;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1983.1676312