Title :
Task Preloading Schemes for Reconfigurable Parallel Processing Systems
Author :
Tuomenoksa, David ; Siegel, Howard Jay
Author_Institution :
Integrated Systems Laboratory, AT&T Information Systems
Abstract :
One class of reconfigurable parallel processing systems is based on the use of a large number of processing elements where each processing element consists of a processor and a primary memory. To efficiently employ the processing elements, it is desirable to overlap the operation of the secondary storage with computations being performed by the processors. Due to the dynamically reconfigurable architecture of such systems, the processors which will execute a new task may not be selected until they are ready to run the task. That is, a task must be preloaded prior to the final selection of the processors on which it will execute. Two schemes which allow for the secondary storage to preload input data and programs into the primary memories so that processor utilization can be increased and system response time decreased are presented. PASM is used as an example system for comparing the performance of the schemes by simulation studies. Results show that both methods are effective techniques. These schemes can be applied to reconfigurable parallel processing systems which use a centralized scheduling policy.
Keywords :
Distributed processing; PASM; memory management; multimicroprocessor systems; multiple-SIMD machines; parallel processing; performance evaluation; reconfigurable computer systems; scheduling; Communication system control; Computational modeling; Delay; Laboratories; Memory management; Multiprocessor interconnection networks; Parallel processing; Processor scheduling; Reconfigurable architectures; Switches; Distributed processing; PASM; memory management; multimicroprocessor systems; multiple-SIMD machines; parallel processing; performance evaluation; reconfigurable computer systems; scheduling;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1984.1676350