• DocumentCode
    1149592
  • Title

    The VLSI Implementation of a Reed—Solomon Encoder Using Berlekamp´s Bit-Serial Multiplier Algorithm

  • Author

    Hsu, In-shek ; Reed, Irving S. ; Truong, T.K. ; Wang, Ke ; Yeh, Chiunn-shyong ; Deutsch, Leslie J.

  • Author_Institution
    Department of Electrical Engineering, University of Southern California
  • Issue
    10
  • fYear
    1984
  • Firstpage
    906
  • Lastpage
    911
  • Abstract
    Berlekamp has developed for the California Institute of Technology Jet Propulsion Laboratory (JPL) a bit-serial multiplication algorithm for the encoding of Reed-Solomon (RS) codes, using a dual basis over a Galois field. The conventional RS encoder for long codes often requires lookup tables to perform multiplication of two field elements. Berlekamp´s algorithm requires only shifting and EXCLUSIVE OR operations. It is shown in this paper that the new dual-basis (255,223) RS encoder can be realized readily on a single VLSI chip with NMOS technology.
  • Keywords
    Berlekamp´s bit-serial multiplier; Reed-Solomon code; VLSI; dual basis; trace; Computer errors; Error correction codes; Galois fields; Laboratories; MOS devices; Polynomials; Propulsion; Reed-Solomon codes; Table lookup; Very large scale integration; Berlekamp´s bit-serial multiplier; Reed-Solomon code; VLSI; dual basis; trace;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1984.1676351
  • Filename
    1676351
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1149592