DocumentCode
1149601
Title
Two Designs of a Fault-Tolerant Clocking System
Author
Kessels, J.L.W.
Author_Institution
Philips Research Laboratories
Issue
10
fYear
1984
Firstpage
912
Lastpage
919
Abstract
Two designs of a fault-tolerant clocking system are described: a time-discrete design based on autonomous oscillators and a time-continuous design based on voltage-controlled oscillators. In both designs the system consists of a number of identical modules producing as many mutually synchronous binary clock signals. The system is fault-tolerant in that if at most f modules fail, the remaining modules continue to produce synchronous clock signals. The minimum configuration, i.e., the minimum number of modules that guarantees a fault-tolerant operation, is either 3f + 1 or 2f + 1, depending on both the design chosen (time-discrete or time-continuous) and the assumed fault model.
Keywords
Binary clocks; correctness proof; fault-tolerant clocking system; fault-tolerant systems; massive redundancy; multiple modular redundancy; synchronization; triple modular redundancy (TMR); Automata; Clocks; Decoding; Fault tolerance; Fault tolerant systems; Redundancy; Signal design; Signal processing; Synchronization; Voltage-controlled oscillators; Binary clocks; correctness proof; fault-tolerant clocking system; fault-tolerant systems; massive redundancy; multiple modular redundancy; synchronization; triple modular redundancy (TMR);
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1984.1676352
Filename
1676352
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