Efficient partitioning-based method to determine the upper bound on the number of operating points in transistor circuits

An efficient method to assess the upper bound on the number of DC solutions is presented. It decomposes the original circuit into successive subcircuits by implementing a partitioning procedure, which is based on a topological analysis of the circuit. In a further step the uniqueness of the DC operating point is determined, and how many operating points can occur. Because the obtained subcircuits contain fewer nonlinearities, this process can be carried out in an efficient manner, resulting in a significant saving in the number of calculations. In addition, the circuit is described by a linear transformation of the well known MNA representation. This allows the method to be easily implemented in a simulation environment