DocumentCode
1150124
Title
Finding Maximum on an Array Processor with a Global Bus
Author
Bokhari, Shahid H.
Author_Institution
Department of Electrical Engineering, University of Engineering and Technology
Issue
2
fYear
1984
Firstpage
133
Lastpage
139
Abstract
The problem of finding the maximum of a set of values stored one per processor on an n X n array of processors is analyzed. The array has a time-shared global bus in addition to conventional processor-processor links. A two-phase algorithm for finding the maximum is presented that uses conventional links during the first phase and the global bus during the second. This algorithm is faster than algorithms that use either only the global bus or only the conventional links.
Keywords
Array processors; global bus; interconnection structures; maximum; networks; parallel processing; two-phase algorithm; Application software; Broadcast technology; Broadcasting; Computer networks; Finite element methods; LAN interconnection; NASA; Nearest neighbor searches; Parallel processing; Pattern analysis; Array processors; global bus; interconnection structures; maximum; networks; parallel processing; two-phase algorithm;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1984.1676405
Filename
1676405
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