• DocumentCode
    1150636
  • Title

    Relaxable damage in hot-carrier stressing of n-MOS transistors-oxide traps in the near interfacial region of the gate oxide

  • Author

    Bourcerie, Marc ; Doyle, Brian S. ; Marchetaux, Jean-Claude ; Soret, Jean-Claude ; Boudou, Alain

  • Author_Institution
    BULL SA, Les Clayes sous Bois, France
  • Volume
    37
  • Issue
    3
  • fYear
    1990
  • fDate
    3/1/1990 12:00:00 AM
  • Firstpage
    708
  • Lastpage
    717
  • Abstract
    An examination of the relaxable hot-carrier stressing damage indicates that the relaxation is due to charge trapped in the oxide located within tunneling distance of the Si-SiO2 interface, which charges during stressing and discharges by tunneling back out into the silicon. Both hole and electron traps are involved. The traps can be filled, either by injecting charge into the oxide by channel hot-carrier stressing, or by applying a strong bias to the gate (±4 MV/cm), with the drain grounded so that electrons/holes tunnel in from the silicon. The relaxable states can thus be thought of as constituting a third type of stress-induced defect, having some of the characteristics of both interface states and oxide trapped charge. They are found to be created for the stressing conditions around Vg=V d/4, indicating that they are generated by hot hole injection. The sites, which appear to be situated at fixed distances into the oxide from the interface, are created obeying a time power law with gradient 0.3. Athough the relaxable states typically make up about 5-20% of the total hot carrier damage, they may be of some importance as they could be the precursors to interface states
  • Keywords
    electron traps; hole traps; hot carriers; insulated gate field effect transistors; interface electron states; semiconductor device testing; Si-SiO2 interface; channel hot-carrier stressing; electron traps; hot hole injection; interface states; n-MOS transistors; oxide trapped charge; relaxable hot-carrier stressing damage; semiconductor; stress-induced defect; time power law; tunneling distance; Degradation; Electron traps; Fault location; Helium; Hot carriers; Interface states; Silicon; Tunneling; Virtual reality; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.47776
  • Filename
    47776