DocumentCode
1150713
Title
Functional Testing of Microprocessors
Author
Brahme, Dhananjay ; Abraham, Jacob A.
Author_Institution
Coordinated Science Laboratory, University of Illinois
Issue
6
fYear
1984
fDate
6/1/1984 12:00:00 AM
Firstpage
475
Lastpage
485
Abstract
This paper presents a new and systematic method to generate tests for microprocessors. A functional level model for the microprocessor is used and it is represented by a reduced graph. A new and comprehensive model of the instruction execution process is developed. Various types of faults are analyzed and it is shown that with the use of appropriate codewords all faults can be classified into three types. This gives rise to a systematic procedure to generate tests which is independent of the microprocessor implementation details. Tests are given to detect faults in any microprocessor, first for the READ register instructions, and then for the remaining instructions. These tests can be executed by the microprocessor in a self-test mode, thus dispensing with the need for an external tester.
Keywords
Automatic testing; Circuit faults; Circuit testing; DH-HEMTs; Integrated circuit modeling; Logic testing; Microprocessors; Registers; Software testing; System testing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1984.1676471
Filename
1676471
Link To Document