DocumentCode
1151361
Title
On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors
Author
Biswas, Nripendra N.
Author_Institution
Department of Electrical Communication Engineering, Indian Institute of Science
Issue
11
fYear
1985
Firstpage
1057
Lastpage
1061
Abstract
The microcommands constituting the microprogram of the control memory of a microprogrammed processor can be partitioned into a number of disjoint sets. Some of these sets are then encoded to minimize the word width of the ROM storing the microprogram. A further reduction in the width of the ROM words can be achieved by a technique known as bit steering where one or more bits are shared by two or more sets of microcommands. These sets are called the steerable sets. This correspondence presents a simple method for the detection and encoding of steerable sets. It has been shown that the concurrency matrix of two steerable sets exhibits definite patterns of clusters which can be easily recognized. A relation "connection" has been defined which helps in the detection of three-set steerability. Once steerable sets are identified, their encoding becomes a straightforward procedure following the location of the identifying clusters on the concurrency matrix or matrices.
Keywords
Bit minimization; ROM compaction; bit steering; control memory; microprogramming; minimization; Circuits; Compaction; Concurrent computing; Encoding; Microprogramming; Optimization methods; Pattern recognition; Read only memory; Bit minimization; ROM compaction; bit steering; control memory; microprogramming; minimization;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1985.1676539
Filename
1676539
Link To Document