Dictionary Machines for Different Models of VLSI

Author

Schmeck, Hartmut ; Schröder, Heiko

Author_Institution

Institut für Informatik und Praktische Mathematik, Christian-Albrechts-Universität

Issue

5

fYear

1985

fDate

5/1/1985 12:00:00 AM

Firstpage

472

Lastpage

475

Keywords

Algorithms for VLSI; Dictionary machines. are taken as an example to demonstrate the implications the choice of the VLSI hardware model has on the design and analysis of algorithms and special purpose architectures. A systolic search tree and a two-dimensional systolic array are used to implement the dictionary machine. If the wire lengths only affect the area, the systolic search tree suggests itself as an efficient realization of a dictionary machine having constant period, linear areS, and logarithmic execution t; VLSI complexity; VLSI hardware models; dictionary machine; systolic array; systolic search tree; Algorithm design and analysis; Binary trees; Delay effects; Delay lines; Dictionaries; Hardware; Performance analysis; Systolic arrays; Very large scale integration; Wire; Algorithms for VLSI; Dictionary machines. are taken as an example to demonstrate the implications the choice of the VLSI hardware model has on the design and analysis of algorithms and special purpose architectures. A systolic search tree and a two-dimensional systolic array are used to implement the dictionary machine. If the wire lengths only affect the area, the systolic search tree suggests itself as an efficient realization of a dictionary machine having constant period, linear areS, and logarithmic execution t; VLSI complexity; VLSI hardware models; dictionary machine; systolic array; systolic search tree;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.1985.1676587

Filename

1676587