Title :
Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array
Author :
Lo, Hao-Yung ; Aoki, Yoshinao
Author_Institution :
Department of Electrical Engineering, National Tsing Hua University
Abstract :
The design algorithm of a differential group programmable logic array (DGPLA) to generate the precise binary logarithm function is suggested. It can reach an optimal condition such that the number of bits in a PLA is minimized, while the error is still kept as small as possible. Thus, the space in the PLA is saved, estimated at only 15.94 percent of the space for a readonly memory (ROM) counterpart.
Keywords :
Arithmetic units error correction; PLA´s; ROM´s; binary antilogarithm generation; binary logarithm generation; differential group programmable logic arrays (DGPLA´s); Algorithm design and analysis; Arithmetic; Error correction; Hardware; Logic design; Logic devices; Piecewise linear approximation; Programmable logic arrays; Read only memory; Registers; Arithmetic units error correction; PLA´s; ROM´s; binary antilogarithm generation; binary logarithm generation; differential group programmable logic arrays (DGPLA´s);
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1985.1676614
