Title :
Efficient scheduling method to reduce memory requirement for lifting-based 2D DWT circuit
Author :
Kim, S. ; Lee, S. ; Cho, K.
Author_Institution :
Dept. of Electron. & Inf. Eng., Hankuk Univ. of Foreign Studies, Yongin-Si, South Korea
Abstract :
An efficient method to schedule the operations involved in the lifting-based 2D DWT is presented. The emphasis is put on the reduction of on-chip memory requirement. The circuit based on the presented method requires a much smaller number of memory cells than other approaches.
Keywords :
discrete wavelet transforms; integrated memory circuits; scheduling; system-on-chip; efficient scheduling method; lifting-based 2D DWT circuit; memory cells; on-chip memory;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20046341
