Title :
Micropower CMOS S&H circuit for ambient intelligence applications
Author :
López-Martín, A.J. ; De La Cruz, C.A. ; Ugalde, X. ; Carvajal, R.G. ; Ramirez-Angulo, J.
Author_Institution :
Dept. of Electr. & Electron. Eng., Public Univ. of Navarra, Pamplona, Spain
Abstract :
A novel sample and hold (S&H) circuit is presented based on the use of a class AB CMOS operational transconductance amplifier with very high slew rate and very low static power consumption. The circuit has been fabricated in a 0.5 μm double-poly CMOS technology. The quiescent power consumption is only 80 μW using a dual supply voltage of ±1.35 V. The S&H occupies 0.075 mm2 of silicon area.
Keywords :
CMOS analogue integrated circuits; low-power electronics; operational amplifiers; sample and hold circuits; 0.5 micron; 1.35 V; 80 muW; CMOS S&H circuit; CMOS operational transconductance amplifier; ambient intelligence applications; class AB amplifier; power consumption; sample and hold circuit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20051904
