Title :
Synthesis of an Optimal Family of Matrix Multiplication Algorithms on Linear Arrays
Author :
Varman, P.J. ; Ramakrishnan, I.V.
Author_Institution :
Department of Electrical and Computer Engineering, Rice University
Abstract :
Synthesis of a family of matrix multiplication algorithms on a linear array is described. All these algorithms are optimal in their area and time requirements. An important feature of the family of algorithms is that they are modularly extensible, that is, larger problem sizes can be handled by cascading smaller arrays consisting of processors having a fixed amount of local storage. These algorithms exhibit a tradeoff between the number of processors required and the local storage within a processor. In particular, as the local storage increases the number of processors required to multiply the two matrices decrease.
Keywords :
Array Processors; VLSI; extensible algorithms; linear array; matrix multiplication; parallel processing; processor-memory tradeoff; Algorithm design and analysis; Application software; Computer peripherals; Computer science; Logic; Parallel processing; Pipeline processing; Very large scale integration; Array Processors; VLSI; extensible algorithms; linear array; matrix multiplication; parallel processing; processor-memory tradeoff;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1986.1676700