Title :
Mapping Homogeneous Graphs on Linear Arrays
Author :
Ramakrishnan, I.V. ; Fussell, D.S. ; Silberschatz, Abraham
Author_Institution :
Department of Computer Science, State University of New York
fDate :
3/1/1986 12:00:00 AM
Abstract :
This paper presents a formal model of linear array processors suitable for VLSI implementation as well as graph representations of programs suitable for execution on such a model. A distinction is made between correct mapping and correct execution of such graphs on this model and the structure of correctly mappable graphs are examined. The formalism developed is used to synthesize algorithms for this model.
Keywords :
Array processors; VLSI; graphs; mapping; parallel processing; synthesis; Application software; Bandwidth; Computer aided instruction; Computer architecture; Computer peripherals; Computer science; Data mining; Parallel processing; Systolic arrays; Very large scale integration; Array processors; VLSI; graphs; mapping; parallel processing; synthesis;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1986.1676744
